008 |
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150610s2011 maua b 001 0 eng |
010 |
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|a 2009044515
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020 |
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|a9780132465571 (IE : pbk.) :|cNT$1400
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020 |
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|a0132465574 (IE : pbk.)
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035 |
|
|a(OCoLC)213835490
|
040 |
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|aTWNTU|beng|cTWNTU|dTWNTU
|
050 |
00
|
|aTK7885.7|b.C5485 2011
|
082 |
00
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|a621.39/5|222
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095 |
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|aNLB|bA9 |cE051025|d621.395|eC572|pBOOK|tDDC|y2011
|
100 |
1
|
|aCiletti, Michael D.
|
245 |
10
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|aAdvanced digital design with the Verilog HDL /|cMichael D. Ciletti.
|
250 |
|
|a2nd ed.
|
260 |
|
|aBoston :|bPrentice Hall,|c©2011.
|
300 |
|
|a983 p. :|bill. ;|c24 cm.
|
490 |
1
|
|aPrentice Hall Xilinx design series
|
504 |
|
|aIncludes bibliographical references and indexes.
|
505 |
0
|
|aIntroduction to digital design methodology -- Review of combinational logic design -- Fundamentals of sequential logic design -- Introduction to logic design with Verilog -- Logic design with behavioral models of combinational and sequential logic -- Synthesis of combinational and sequential logic -- Design and synthesis of datapath controllers -- Programmable logic and storage devices -- Algorithms and architectures for digital processors -- Architectures for arithmetic processors -- Postsynthesis design tasks.
|
650 |
0
|
|aLogic design|xData processing.
|
650 |
0
|
|aVerilog (Computer hardware description language)
|
830 |
0
|
|aPrentice Hall Xilinx design series.
|